preliminary specification p1727/66 oct., 2002 revision b 3160 de la cruz blvd., suite 200 santa clara ca 95054 tel (408) 748-6988 fax (408) 748-0009 1of 6 http ://www.pulsecore.com low power notebook lcd panel emi reduction ic features ? fcc approved method of emi attenuation ? generates a low emi spread spectrum of the input clock frequency ? optimized for frequency range: p1727x: 20mhz to 40mhz p1766x: 40mhz to 80mhz ? internal loop filter minimizes external components and board space ? 8 different frequency deviations ranging from +/-0.625% to ?3.50% ? low inherent cycle-to-cycle jitter ? 3.3v operating voltage ? cmos/ttl compatible inputs and outputs ? ultra low power cmos design tbd ma @3.3v, 54 mhz tbd ma @3.3v, 65 mhz ? supports notebook vga and other lcd timing controller applications ? available in 8 pin soic and tssop ? qualified for industrial temp spec. (+85c) product description the p1727/66 is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. the p1727/66 reduces electromagnetic interference (emi) at the clock source, allowing system wide reduction of emi of down stream (clock and data dependent signals). the p1727/66 allows significant system cost savings by reducing the number of circuit board layers and shielding that are traditionally required to pass emi regulations. the p1727/66 modulates the output of a single pll in order to ?spread? the bandwidth of a synthesized clock, thereby decreasing the peak amplitudes of its harmonics. this results in significantly lower system emi compared to the typical narrow band signal produced by oscillators and most clock generators. lowering emi by increasing a signal?s bandwidth is called ?spread spectrum clock generation?. the p1727/66 uses the most efficient and optimized modulation profile approved by the fcc and is implemented by using a proprietary all-digital method. applications the p1727/66 is targeted towards notebook lcd displays, other displays using an lvds interface, pc peripheral devices, and embedded systems. figure 1 ? p1727/66 pin diagram clkin 1 8 pd# vdd 2 p1727x 7 nc p1766x vss 3 6 nc modout 4 5 ref
preliminary specification p1727/66 oct., 2002 revision b 3160 de la cruz blvd., suite 200 santa clara ca 95054 tel (408) 748-6988 fax (408) 748-0009 2 of 6 http ://www.pulsecore.com figure 2 ? p1727/66 block diagram modulation phase detector frequency divider feedback divider loop f ilter vco output divider pll pd# clkin vdd vss modout p1727/66 block diagram ref table 1-power down selection pd# spread spectrum modout pll mode 0 n/a disabled disabled power down 1 on normal normal normal table 2 frequency deviation selection p/n deviation p/n deviation p1727/66a -1.25% p1727/66e +/-0.625% p1727/66b -1,75% p1727/66f +/-0.875% p1727/66c -2.50% p1727/66g +/-1.25% p1727/66d -3.50% p1727/66h +/-1.75% pin description pin # name type description 1 clkin i connect to externally generated clock signal. 2 vdd p connect to +3.3v 3 vss p ground connection. connect to system ground. 4 modout o spread spectrum clock output. 5 ref i reference output. 6 n/c n/c no connect 7 n/c n/c no connect 8 pd# i pull low to enable power down mode. this pin has an internal pull-up resistor.
preliminary specification p1727/66 oct., 2002 revision b 3160 de la cruz blvd., suite 200 santa clara ca 95054 tel (408) 748-6988 fax (408) 748-0009 3 of 6 http ://www.pulsecore.com figure 3 ? p1727/66 schematic for notebook vga application vdd p2040b 1 8 6 4 3 2 7 5 clkin vdd vss modout pd# ref nc nc 0.1uf 66 mhz pixel clock input p1766a no connect 66 mhz pixel clock with -1.25% frequency deviation tie low to enable power down mode. reference clock output fb
preliminary specification p1727/66 oct., 2002 revision b 3160 de la cruz blvd., suite 200 santa clara ca 95054 tel (408) 748-6988 fax (408) 748-0009 4 of 6 http ://www.pulsecore.com absolute maximum ratings symbol parameter rating unit v dd , v in voltage on any pin with respect to gnd -0.5 to +7.0 v t stg storage temperature -65 to +125 oc t a operating temperature 0 to +70 oc dc electrical characteristics symbol parameter min typ max unit v il input low voltage gnd ? 0.3 - 0.8 v v ih input high voltage 2.0 - v dd + 0.3 v i il input low current (100 k ? input pull-up resistor on inputs sr0, 1) - - -35 a i ih input high current (100 k ? input pull- down resistor on input sson) - - 35 a i xol xout output low current (@ 0.4v, v dd = 3.3v) - 3 - ma i xoh xout output high current (@ 2.5v, v dd = 3.3v) - 3 - ma v ol output low voltage (v dd =3.3v, i ol = 20 ma) - - 0.4 v v oh output high voltage (v dd =3.3v, i oh = 20 ma) 2.5 - - v i dd static supply current standby mode - tbd - ma i cc dynamic supply current normal mode (3.3v and 10 pf loading) tbd f in-min tbd f in-typ tbd f in-max ma v dd operating voltage tbd 3.3 tbd v t on power up time (first locked clock cycle after power up) - 0.18 - ms z out clock output impedance - 50 - ? ac electrical characteristics symbol parameter min typ max unit f in input frequency: p1727-x p1766-x 20 40 - 40 80 mhz t lh note 1 output rise time (measured at 0.8v to 2.0v) 0.7 0.9 1.1 ns t hl note 1 output fall time (measured at 2.0v to 0.8v) 0.6 0.8 1.0 ns t jc jitter (cycle to cycle) - - tbd ps t d output duty cycle 45 50 55 % note1: t lh and t hl are measured into a capacitive load of 15pf
preliminary specification p1727/66 oct., 2002 revision b 3160 de la cruz blvd., suite 200 santa clara ca 95054 tel (408) 748-6988 fax (408) 748-0009 5 of 6 http ://www.pulsecore.com figure 6 ? mechanical package outline, (8 pin soic) d a1 e b a a2 p17xxx lot number yyww h a c l e figure 7 ? mechanical package outline, (8 pin tssop) d a1 e b a a2 h a c l e p 17xxx lot # yyww inches millimeters symbol min nor max min nor max a 0.057 0.064 0.071 1.45 1.63 1.80 a1 0.004 0.007 0.010 0.10 0.18 0.25 a2 0.053 0.061 0.069 1.35 1.55 1.75 b 0.012 0.016 0.020 0.51 0.41 0.31 c 0.004 0.006 0.001 0.10 0.15 0.25 d 0.186 0.194 0.202 4.72 4.92 5.12 e 0.148 0.156 0.164 3.75 3.95 4.15 e 0.050 bsc 1.27 bsc h 0.224 0.236 0.248 5.70 6.00 6.30 l 0.012 0.020 0.028 0.30 0.50 0.70 a 0 5 8 0 5 8 inches millimeters symbol min nor max min nor max a - - 0.047 - - 1.10 a1 0.002 - 0.006 0.05 - 0.15 a2 0.031 0.039 0.041 0.80 1.00 1.05 b 0.007 - 0.012 0.19 - 0.30 c 0.004 - 0.008 0.09 - 0.20 d 0.114 0.118 0.122 2.90 3.00 3.10 e 0.169 0.173 0.177 4.30 4.40 4.50 e 0.026 bsc 0.65 bsc h 0.244 0.252 0.260 6.20 6.40 6.60 l 0.018 0.024 0.030 0.45 0.60 0.75 a 0 - 8 0 - 8
preliminary specification p1727/66 oct., 2002 revision b 3160 de la cruz blvd., suite 200 santa clara ca 95054 tel (408) 748-6988 fax (408) 748-0009 6 of 6 http ://www.pulsecore.com ordering information: x 17xx x - 08 xx example: ordering information "licensed under u.s. patent nos. 5,488,627 and 5,631,920" ordering number marking package type qty. / reel temperature p1727/66x-08st p1727/66x 8 pin soic, tube 0c to 70c p1727/66x-08sr p1727/66x 8 pin soic, tape & reel 2,500 0c to 70c p1727/66x-08tt p1727/66x 8 pin tssop, tube 0c to 70c p1727/66x-08tr p1727/66x 8 pin tssop, tape & reel 2,500 0c to 70c flow p=commercial temperature range ( 0c to 70c) i =industrial temperature range ( -25c to 85c) device number deviation (%) and spread option identifier device pin count package st=soic in tube sr=soic in tape and reel tt=tssop in tube tr=tssop in tape and reel
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